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Espressif Systems /ESP32-S3 /EXTMEM /DCACHE_CTRL

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Interpret as DCACHE_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DCACHE_ENABLE)DCACHE_ENABLE 0 (DCACHE_SIZE_MODE)DCACHE_SIZE_MODE 0DCACHE_BLOCKSIZE_MODE

Description

******* Description ***********

Fields

DCACHE_ENABLE

The bit is used to activate the data cache. 0: disable, 1: enable
DCACHE_SIZE_MODE

The bit is used to configure cache memory size.0: 32KB, 1: 64KB
DCACHE_BLOCKSIZE_MODE

The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes,2: 64 bytes

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Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data